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Sep 07, 2024
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2018-2019 Academic Catalog [ARCHIVED CATALOG]
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CEG 7040 - VLSI Testing and Design for Testability Credit Hour(s): 3 Design for testability of VLSI circuits. Topics include importance of testing, conventional test methods, built-in test, CAD tools for evaluating testability, test pattern generators and compressors, and test for mixed-signal systems and systems-on-a-chip (SOC). Department Managed Prerequisite(s): (Undergraduate level EE 4540 Minimum Grade of D and Undergraduate level EE 4540L Minimum Grade of D) or (Graduate level EE 6540 Minimum Grade of D and Graduate level EE 6540L Minimum Grade of D) Corequisite(s): CEG7040L Enrollment Restrictions: Must be enrolled in one of the following Levels: Graduate, Medical, Professional.
Level: Graduate Schedule Type(s): Lecture
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