2012-2015 Academic Catalog 
    
    Feb 08, 2025  
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2012-2015 Academic Catalog [ARCHIVED CATALOG]

CEG 7030 - VLSI Design Synthesis and Optimization

Course Type: Computer Engineering
Credit Hour(s): 3
VLSI Synthesis and optimization including data path synthesis, glue logic synthesis control-unit synthesis, and resource sharing. Covers behavioral level to layout level synthesis and corresponding algorithms.
DOC 2
Level: Graduate
Schedule Type(s): Lecture
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