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Apr 25, 2024
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2017-2018 Academic Catalog [ARCHIVED CATALOG]
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EE 2000 - Digital Design with HDL Credit Hour(s): 3 Introduction to combinational and synchronous sequential digital system design and optimization. Use of structural hardware description language (HDL) with CAD tools for design and simulation in a field programmable gate array (FPGA) based laboratory environment. Design and testing of simple combinational and synchronous sequential circuits. Prerequisite(s): WSU Math Placement 05 or Undergraduate level MTH 1280 Minimum Grade of C Corequisite(s): EE2000L Level: Undergraduate Schedule Type(s): Lecture
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